Please use this identifier to cite or link to this item:
http://13.232.72.61:8080/jspui/handle/123456789/10741Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.date.accessioned | 2026-06-26T06:19:54Z | - |
| dc.date.available | 2026-06-26T06:19:54Z | - |
| dc.date.issued | 2026-01 | - |
| dc.identifier.uri | http://13.232.72.61:8080/jspui/handle/123456789/10741 | - |
| dc.language.iso | en | en_US |
| dc.publisher | VTU | en_US |
| dc.subject | Electrical and communication | en_US |
| dc.subject | Question Papers | en_US |
| dc.subject | 3rd Sem | en_US |
| dc.title | Department of Electrical and Communication Engineering | en_US |
| dc.type | Other | en_US |
| Appears in Collections: | Dec 2025 - Jan 2026 | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Digital System Design Using Verilog_BEC302.pdf | 905.06 kB | Adobe PDF | View/Open | |
| Electronics Principles and Circuits-BEC303.pdf | 1.96 MB | Adobe PDF | View/Open | |
| Basic Signal Processing-21EC33.pdf | 3.09 MB | Adobe PDF | View/Open |
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